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Welcome to the Embedded Computing Laboratory (ECL) website!

Itaguazu Beach, Florianópolis (photo credit: José Luís Güntzel)

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About us

The Embedded Computing Lab (ECL) is one of the research laboratories of the Technology Center (CTC – Centro Tecnológico) of the Federal University of Santa Catarina (UFSC – Universidade Federal de Santa Catarina).

Its team is composed of professors, mostly from the Department of Informatics and Statistics (INE), PhD, Master’s and undergraduate students from the fields of Computer Science, Electronic Engineering and Electrical Engineering. The research activities carried out are guided by the technological trends of implementation of high complexity integrated computer systems (SOCs – systems-on-chip), both in terms of hardware design and development of embedded applications on chip.

Check out our Youtube Channel YouTube logo and our Linkedin profile YouTube logo.

equipe_ECL_2023

Mission Statement

ECL’s primary mission is scientific research into new artifacts and new computing and hardware design techniques aimed at the requirements of Embedded Computing on Chip.

Research Areas

Algorithms and Architectures for Image and Video Processing

Video compression is of extreme importance for the usage of digital videos. At ECL, we develop hardware solutions such as the Fractional Motion Estimation, one of the most expensive steps in video coding, reducing significantly the energy consumption. We also combine traditional methods with Artificial Inteligence to improve the coding efficiency.

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Digital Integrated Circuits Design

Integrated Circuits (ICs) or “chips” are present in all electronic devices today. At ECL, we have developed a digital design flow for ASICs (application-specific integrated circuits) starting from the RTL description until the generation of the GDSII, a file containing the information for manufacturing the chip. We work with different technological nodes, as well as open source and private PDKs from various foundries around the world.

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Algorithms and Techniques for Electronic Design Automation

For VLSI (Very Large Scale Integration) projects, computational tools that automate the design flow of integrated circuits are needed. At ECL, we work with algorithms and techniques for chip design automation (EDA – Electronic Design Automation), investigating the integration of tools for approximate synthesis with traditional flows and enabling the reduction of energy consumption in various applications.

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Algoritmos e Arquiteturas para Processamento de Imagem e Vídeo Digital com Foco em Aplicações de Compressão

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Algoritmos e Arquiteturas para Aprendizado de Máquina com Baixo Custo Computacional

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Algoritmos e Técnicas para a Automação do Projeto de Chips

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Circuitos e Sistemas Tolerantes a Falhas

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Avaliação da Robustez de Circuitos CMOS com FinFET

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Error-tolerant Circuits and Systems

With the miniaturization of transistors, more and more particles are capable of interacting and interfering with the operation of electronic devices. At ECL, we develop techniques to study and mitigate the effects of the interaction of electrical particles in different types of circuits, in different technological nodes.

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Multicore Testing

General-purpose processors have complex protocols for working with memory accesses, and these protocols need to be validated. ECL has developed a framework for verification: AI algorithms direct the tests by generating parameters to create parallel programs, which are simulated, checked and which generate analysis information for new tests.

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Projects

Ophidian

Open-Source Library for Physical Design Research and Teaching

Ophidian is an open source library that aims to facilitate the teaching and research of algorithms and techniques for the automation of EDA (Electronic Design Automation) chip design, especially in the physical design stages (placement, routing, legalization, clock-tree synthesis etc). It offers an open source code of an basic infrastructure composed of efficient data structures, input and output routines for the main industrial formats and implementations of several classical algorithms.


Source code


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Theseus

Theseus is an Open Source project of a video encoding system. The goal of this project is to generate a modular and clear software architecture for educational and research purposes.


Source code

Ophidian

Open-Source Library for Physical Design Research and Teaching

Ophidian is an open source library that aims to facilitate the teaching and research of algorithms and techniques for the automation of EDA (Electronic Design Automation) chip design, especially in the physical design stages (placement, routing, legalization, clock-tree synthesis etc). It offers an open source code of an basic infrastructure composed of efficient data structures, input and output routines for the main industrial formats and implementations of several classical algorithms.


Source code


Learn more

Theseus

Theseus is an Open Source project of a video encoding system. The goal of this project is to generate a modular and clear software architecture for educational and research purposes.


Source code

Researchers

Professors



Cristina Meinhardt

  • Error-tolerant circuits and systems
    • Analysis of the robustness of FinFET technology
    • Exploration of mitigation techniques in hardware and software
  • Algorithms and techniques for automating the design of VLSI chips – EDA (Electronic Design Automation)
  • Digital project aiming energy efficiency
    • Exploring machine learning and approximate computing techniques









 



José Luís Güntzel

  • Algorithms and hardware architectures for digital video compression processing
  • Software for chip design (EDA – Electronic Design Automation), especially positioning and routing
  • Machine learning application to digital video compression and EDA
  • Design of energy-efficient Systems on a Chip (SoCs)







 



Luiz Cláudio Villar dos Santos

  • Electronic Design Automation (EDA), especially Functional Verification of Multicore Chips
  • Memory system verification
  • Application of Deep Learning techniques to verify coherent shared memory models





 



Mateus Grellert

  • Algorithms and hardware architectures for digital video compression processing
  • Software for chip design (EDA – Electronic Design Automation), especially positioning and routing
  • Machine learning application to digital video compression and EDA
  • Design of energy-efficient Systems on a Chip (SoCs)





 



Ismael Seidel

  • Hardware and software solutions for visual signals processing/compression
    • Images
    • Videos
    • Light fields
    • Point clouds
  • Application of machine learning  to visual signals compression
  • Low energy consumption
    • Dedicated hardware architectures
    • Approximate computing





 

Collaborators




Laleh Bejat

Affiliation: University of Calgary,  Canada






Laércio Lima Pilla

Affiliation: LaBRI (CNRS & Univ. de Bordeaux), France






Luis Alberto da Silva Cruz

Affiliation: University of Coimbra, Portugal






Vinícius dos Santos Livramento

Affiliation: Flow Traders, Netherlands







Jônata Tyska Carvalho

Affiliation: Federal University of Santa Catarina (UFSC), Brazil







Leonardo Bandeira Soares

Affiliation: Federal Institute of Rio Grande do Sul, Brazil









Laleh Bejat

Affiliation: University of Calgary, Canada





 



Luis Alberto da Silva Cruz

Affiliation: University Coimbra, Portugal





 



Laércio Lima Pilla

Affiliation: LaBRI (CNRS & Univ. de Bordeaux), France





 



Ismael Seidel










 



Vinícius dos Santos Livramento

Affiliation: Flow Traders, Netherlands







 



Leonardo Bandeira Soares

Affiliation: Federal Institute of Rio Grande do Sul, Brazil







 



Jônata Tyska Carvalho

Affiliation: Federal University of Santa Catarina (UFSC), Brazil







 

PhD Students




André Beims Bräscher







Augusto Andre Souza Berndt








Bruno Dourado Miranda







Luiz Henrique De Lorenzi Cancellier

Marcio Monteiro








Sheiny Fabre Almeida








Tiago Augusto Fontana








Vinícius Zanandrea






Vinícius Zanandrea








André Beims Bräscher










 



Augusto Andre Souza Berndt













     



    Gabriel Arthur Gerber Andrade










     


    Luiz Henrique De Lorenzi Cancellier

     



    Marcio Monteiro













     



    Renan Oliveira Netto













     



    Sheiny Fabre Almeida













     



    Tiago Augusto Fontana













     



    Vinícius Zanandrea







     

Master’s Students

Nícolas Pfeifer







Vanio Rodrigues Filho






Undergraduate Students

Bolsistas de IC, Alunos de TCC e Voluntários




Arthur João Lourenço



Bernardo Borges Sandoval







Felipe Elton Pazini Savi




Fillipi Mangrich Costa de Souza





Gabriel Lima Jacinto





Gabriela Furtado da Silveira





Isac de Souza Campos




João Carlos Prats Ramos




João Gabriel Firta Foes





João Mai





João Marcos Marqueti




João Pedro Cantador





Luis Antonio Spader Simon





Matheus Fernandes Bigolin




Murillo Cordeiro Guindani




Naiara Sachetti






Arthur João Lourenço




 



Bernardo Borges Sandoval










 



Bruna Suemi Nagai










 



Daniel Igiski Baron







 



Luis Antonio Spader Simon










 



Gabriel Baiocchi de Sant’Anna













 



Gabriel Lima Jacinto













 



Isac de Souza Campos










 



Luis Antonio Spader Simon










 



Marcelo Renato Garcia Pezzolla













 



Murillo Cordeiro Guindani










 



Pedro Henrique Aquino Silva










 



Pedro Machado Santos Rohde










 



Rafael Neves de Mello Oliveira













 



Bryan Martins Lima













 

Partnerships














Contact Us

Address

University Campus, s/n, Trindade district
Technology Center (CTC)
INE Building, room 417
P.O. Box 476 / CEP 88040-900
Florianópolis / SC

E-mail

eclufsc@gmail.com

Address

University Campus, s/n, Trindade district
Technology Center (CTC)
INE Building, room 417
P.O. Box 476 / CEP 88040-900
Florianópolis / SC

E-mail

eclufsc@gmail.com